[General Module Information] |
| Module Number: | 0 |
| Module Size: | 8 GBytes |
| Memory Type: | DDR4 SDRAM |
| Module Type: | SO-DIMM |
| Memory Speed: | 1333.3 MHz (DDR4-2666 / PC4-21300) |
| Module Manufacturer: | SK Hynix |
| Module Part Number: | HMA81GS6CJR8N-VK |
| Module Revision: | 0.0 |
| Module Serial Number: | 2396109101 |
| Module Manufacturing Date: | Year: 2018, Week: 46 |
| Module Manufacturing Location: | 1 |
| SDRAM Manufacturer: | SK Hynix |
| Error Check/Correction: | None |
| | |
[Module Characteristics] |
| Row Address Bits: | 16 |
| Column Address Bits: | 10 |
| Module Density: | 8192 Mb |
| Number Of Ranks: | 1 |
| Device Width: | 8 bits |
| Bus Width: | 64 bits |
| Die Count: | 1 |
| Module Nominal Voltage (VDD): | 1.2 V |
| Minimum SDRAM Cycle Time (tCKAVGmin): | 0.75000 ns |
| Maximum SDRAM Cycle Time (tCKAVGmax): | 1.60000 ns |
| CAS# Latencies Supported: | 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20 |
| Minimum CAS# Latency Time (tAAmin): | 13.750 ns |
| Minimum RAS# to CAS# Delay (tRCDmin): | 13.750 ns |
| Minimum Row Precharge Time (tRPmin): | 13.750 ns |
| Minimum Active to Precharge Time (tRASmin): | 32.000 ns |
| | |
| Supported Module Timing at 1333.3 MHz: | 19-19-19-43 |
| Supported Module Timing at 1200.0 MHz: | 17-17-17-39 |
| Supported Module Timing at 1066.7 MHz: | 15-15-15-35 |
| Supported Module Timing at 933.3 MHz: | 13-13-13-30 |
| Supported Module Timing at 800.0 MHz: | 11-11-11-26 |
| Supported Module Timing at 666.7 MHz: | 10-10-10-22 |
| | |
| Minimum Active to Active/Refresh Time (tRCmin): | 45.750 ns |
| Minimum Refresh Recovery Time Delay (tRFC1min): | 350.000 ns |
| Minimum Refresh Recovery Time Delay (tRFC2min): | 260.000 ns |
| Minimum Refresh Recovery Time Delay (tRFC4min): | 160.000 ns |
| Minimum Four Activate Window Delay Time (tFAWmin): | 21.000 ns |
| Minimum Active to Active Delay Time - Different Bank Group (tRRD_Smin): | 3.000 ns |
| Minimum Active to Active Delay Time - Same Bank Group (tRRD_Lmin): | 4.900 ns |
| Minimum CAS to CAS Delay Time - Same Bank Group (tCCD_Lmin): | 5.000 ns |
| | |
[Features] |
| Module Temperature Sensor (TSOD): | Not Supported |
| Module Nominal Height: | 29 - 30 mm |
| Module Maximum Thickness (Front): | 1 - 2 mm |
| Module Maximum Thickness (Back): | 1 - 2 mm |
| Address Mapping from Edge Connector to DRAM: | Standard |